Is it possible that I changed center frequency and gain of USRP from the Verilog code (In a RFNOC block)?

[stackprogramer]

Is it possible that I changed center frequency and gain of USRP from the Verilog code? I study API CPP Gnuradio and UHD, In CPP we can change the frequency and gain of USRP easily ... But for me there is a question can I change the frequency or gain USRP from Verilog in an RFNOC block? Thanks in advance