test/6800.c 6800 emulator's clock_count table is incorrect.

[zu2]

The number of 6800 instruction cycles listed in the clock_count table for the 6800 emulator was still incorrect.

This has been corrected from the MOTOROLA M6800 Microprocessor Applications Manual.

--- ../Fuzix-Compiler-Kit/test/6800.c	2024-10-10 23:20:13
+++ test/6800.c	2024-10-12 08:53:09
@@ -291,12 +291,12 @@
     { 7, 6, 6, 6 },			/* ROL */
     { 7, 6, 6, 6 },			/* DEC */
     { 0, 0, 5, 5 },			/* TIM */
-    { 6, 6, 6, 6 },			/* INC */
-    { 6, 6, 4, 4 },			/* TST */
+    { 7, 6, 6, 6 },			/* INC */
+    { 7, 6, 4, 4 },			/* TST */
     { 4, 3, 3, 3 },			/* JMP */
-    { 6, 6, 5, 5 },			/* CLR */
+    { 7, 6, 5, 5 },			/* CLR */
     /* 70: extended form (immediate for AIM/OIM etc) */
-    { 7, 6, 6, 6 },			/* NEG */
+    { 6, 6, 6, 6 },			/* NEG */
     { 0, 0, 6, 6 },			/* AIM */
     { 0, 0, 6, 6 },			/* OIM */
     { 6, 6, 6, 6 },			/* COM */
@@ -337,15 +337,15 @@
     { 3, 3, 3, 3 },			/* ANDA */
     { 3, 3, 3, 3 },			/* BITA */
     { 3, 3, 3, 3 },			/* LDAA */
-    { 3, 3, 3, 3 },			/* STAA */
+    { 4, 3, 3, 3 },			/* STAA */
     { 3, 3, 3, 3 },			/* EORA */
     { 3, 3, 3, 3 },			/* ADCA */
     { 3, 3, 3, 3 },			/* ORAA */
     { 3, 3, 3, 3 },			/* ADDA */
-    { 5, 5, 4, 4 },			/* CPX */
+    { 4, 5, 4, 4 },			/* CPX */
     { 1, 5, 5, 5 },			/* JSR  (HCF on 6800)*/
     { 4, 4, 4, 4 },			/* LDS */
-    { 4, 4, 4, 4 },			/* STS */
+    { 5, 4, 4, 4 },			/* STS */
     /* A0: A ops, indexed */
     { 5, 4, 4, 4 },			/* SUBA */
     { 5, 4, 4, 4 },			/* CMPA */
@@ -376,7 +376,7 @@
     { 4, 4, 4, 4 },			/* ADCA */
     { 4, 4, 4, 4 },			/* ORAA */
     { 4, 4, 4, 4 },			/* ADDA */
-    { 6, 6, 5, 5 },			/* CPX */
+    { 5, 6, 5, 5 },			/* CPX */
     { 9, 6, 6, 6 },			/* JSR */
     { 5, 5, 5, 5 },			/* LDS */
     { 6, 5, 5, 5 },			/* STS */
@@ -397,7 +397,7 @@
     { 0, 0, 0, 0 },			/* 68HC11:Prefix CD */
     { 3, 3, 3, 3 },			/* LDX */
     { 3, 3, 3, 3 },			/* STX undoc, 68HC11: STOP */
-    /* D0: A ops, dir */
+    /* D0: B ops, dir */
     { 3, 3, 3, 3 },			/* SUBB */
     { 3, 3, 3, 3 },			/* CMPB */
     { 3, 3, 3, 3 },			/* SBCB */