Add DR_DISASM_AARCH64 standard disassembly style

[derekbruening]

Xref #4381

This covers adding -syntax_aarch64 and DR_DISASM_AARCH64 support for disassembly in standard style for AArch64. (Using DR_DISASM_ARM results in no operands being printed at all: #4381).

[derekbruening]

For now I'm lumping opcode alias issues here as well: we can separate if desired.

For an instruction in the aarch64 trace in the new trace samples repository https://github.com/DynamoRIO/drmemtrace_samples, DR calls it subs:

$ bin64/drrun -t drcachesim -indir drmemtrace_samples/threadsig.aarch64/drmemtrace.threadsig.11451.1365.dir -simulator_type view -module_file drmemtrace_samples/threadsig.aarch64/drmemtrace.threadsig.11451.1365.dir/raw/modules.log -alt_module_dir drmemtrace_samples/threadsig.aarch64/binaries
...
  0x0000000000402e4c  6b0300bf   subs   %w5 %w3 lsl $0x00 -> %wzr

$ clients/bin64/drdisas 6b0300bf
 6b0300bf   subs   %w5 %w3 lsl $0x00 -> %wzr

But everybody else calls it cmp:

$ echo "0xbf 0x00 0x03 0x6b" | /usr/bin/llvm-mc-8 -arch aarch64 --disassemble
	cmp	w5, w3
$ aarch64-linux-gnu-objdump -d threadsig 
  402e4c:       6b0300bf        cmp     w5, w3

In the manual they are listed as aliases of each other, so it seems to be a disassembly style issue: hence lumping under here for now.

[AssadHashmi]

Xref #4386 Ideally we should disassemble SYS instructions to their aliases, DC, IC etc. e.g. SYS #3, C7, C4, #1, Xt should disassemble as DC ZVA, Xt

[derekbruening]

Xref #4386 Ideally we should disassemble SYS instructions to their aliases, DC, IC etc. e.g. SYS #3, C7, C4, #1, Xt should disassemble as DC ZVA, Xt

The proposal is to split SYS into separate opcodes for each sub-type, which first needs #4393.

[derekbruening]

Xref #1683 on ARM disassembly and the discussion there on the general decision of first-class support via printf-ish templates per opcode/encode type vs deducing styles. For both x86 and ARM we went with deducing but it's not clear it is the best solution.

[abhinav92003]

Re the aliases: this came up again in discussion internally when an instruction that objdump shows as OP_mov showed up as an OP_orr in DR's view tool. Would be nice to show the aliased opcode when possible.