AArch64 is missing XINST_CREATE and INSTR_CREATE macros
Split from #1569. AArch64 is missing a number of XINST_CREATE macros, and nearly all of its INSTR_CREATE macros. This is hindering tool development: e.g., I'm adding some instrumentation to drcachesim that does an AND operation yet there's no XINST_CREATE_and_s. This makes it difficult for new tool code to be cross-platform. It would be best to avoid new code having to be disabled for AArch64.
Presumably the XINST_CREATE macros will be written by hand and are required more urgently than the INSTR_CREATE macros, which could be generated automatically.
There seem to be 27 XINST_CREATE macros for x86 and ARM. AArch64 currently has 19: compared to the other architectures, there are 9 missing, and one extra one, presumably added in error. So XINST_CREATE_and should be removed.
Agreed, but the missing INSTR_CREATE are also causing some pain now: e.g. I'm adding a right-shift XINST_CREATE to use in drcachesim and it would be much easier if there were an INSTR_CREATE_lsr that auto-added whatever extend or shift extra params I want to ignore -- we don't want devs to have to either study the A64 manual and encoder or bail on supporting A64.
In A64, LSR (immediate) is an alias of UBFM, and LSR (register) is an alias of LSRV. So an XINST_CREATE_lsr would definitely be helpful.
XINST_CREATE macros were added for AArch64 in 3c49cc0.
@prakharbahuguna is working on this. I could not assign it to him, so I assigned myself to make sure it's not unassigned any more.
Hit another case today where I want to put in a pre-index pair push but there is no support for that so I had to do this:
instr_create_2dst_4src(dc, OP_stp,
opnd_create_base_disp(DR_REG_XSP, DR_REG_NULL, 0,
-2 * (int)sizeof(void *), OPSZ_16),
opnd_create_reg(DR_REG_XSP), opnd_create_reg(DR_REG_R29),
opnd_create_reg(DR_REG_LR), opnd_create_reg(DR_REG_XSP),
OPND_CREATE_INT8(-2 * (int)sizeof(void *))));
Hit another one: there is no INSTR_CREATE_madd.
Hit another one: there is no
INSTR_CREATE_madd.
A PR will be raised to add this shortly. How do you find missing macros? Do you have test(s) or do you find them as a result of core/client/tool development work.
Hit another one: there is no
INSTR_CREATE_madd.A PR will be raised to add this shortly. How do you find missing macros? Do you have test(s) or do you find them as a result of core/client/tool development work.
Development work: someone writes new code that wants to create a certain instruction and discovers there is no convenience macro for it.
I always imagined these would be auto-generated from the codec and then no manual work would be needed?
Hit another one: there is no
INSTR_CREATE_madd.A PR will be raised to add this shortly. How do you find missing macros? Do you have test(s) or do you find them as a result of core/client/tool development work.
Development work: someone writes new code that wants to create a certain instruction and discovers there is no convenience macro for it.
I always imagined these would be auto-generated from the codec and then no manual work would be needed?
Post v8.0 versions are auto-generated. Original v8.0 was mostly manual (and before my time). Perhaps we should write a script to check macros exist for all of v8.0...
Hit another one: there is no
INSTR_CREATE_madd.A PR will be raised to add this shortly. How do you find missing macros? Do you have test(s) or do you find them as a result of core/client/tool development work.
Development work: someone writes new code that wants to create a certain instruction and discovers there is no convenience macro for it. I always imagined these would be auto-generated from the codec and then no manual work would be needed?
Post v8.0 versions are auto-generated. Original v8.0 was mostly manual (and before my time). Perhaps we should write a script to check macros exist for all of v8.0...
Our x86 tests systematically check, for every opcode OP_ value, that an INSTR_CREATE_ macro exists and that it encodes to a value that is decoded to that same opcode.