Properly implement open bus behaviour differences across memory regions

[DaveTCode]

Openbuster test suggests that read/writes can be merged to fill in open bus values, not clear on the details yet

[DaveTCode]

I have a feeling that all the complexity of open bus shouldn't exist in my emulator since I'm emulating the D signal values at cycle level accuracy.

At heart open bus is just saying "if you set A line to a memory address which doesn't exist then D doesn't change". There are a few interesting points to think about thought:

1. What happens when D is filled with a byte/halfword value from a memory subsystem. Does that subsystem overwrite the whole of D or just the bit of D it's using?
2. Have I correctly understood how rotating values into the data line works? I'm not convinced that I have, I have a nasty feeling that my LDR/STR utils work around this rather than doing it properly where the value on the data line is based on alignment of the address.

[DaveTCode]

https://github.com/nba-emu/NanoBoyAdvance/blob/68eb934fe2eabdbe41d554912483331f81decc60/src/nba/src/bus/bus.cpp#L275