Making use of Alder Lake early VGA initialization

[zirblazer]

The problem you're addressing (if any) Making use of Intel recent commits to upstream Coreboot about early VGA initialization (Before RAM is initialized) in Alder Lake (Not sure which other platforms are supported). The patchs in question: https://review.coreboot.org/c/coreboot/+/70299/ I'm not sure if they're ready to use or if there is more work to be done before getting anything usable out of them.

Describe the solution you'd like Making a Dasharo branch to test the patches to figure out if it meets my usefulness expectations for further development.

Where is the value to a user, and who might that user be? Intel target is to get some status messages on screen during DRAM training so that it can mitigate long POST times so that the user doesn't panic thinking than system is bricked. If it is "good enough", it can even be used for more interesing stuff.

Describe alternatives you've considered Maintaining the status quo by simply doing nothing.

Additional context Intel patches seems to make the Alder Lake IGP run in a CAR (Cache-as-RAM) mode that allows it to turn on a video output and display something though it extremely early on the POST process, even before proper DRAM initialization. If it works well enough, you could somehow pipe debug info that usually gets outputted to Serial Port onto the screen itself so that if Coreboot gets stuck, you could potentially take a photo of the screen to ask developers for help in troubleshooting with at least the end of the log. This could give a major debug alternative to Alder Lake systems with no easy Serial Port access.

It could even be interesing about how much CAR environments can be pushed, as modern Processors with around 16-20 MiB of Cache could be potentially able to run an embedded OS or something like that for diagnostics or whatever, without RAM installed. Intel itself seems to consider no RAM installed a viable use case in the recently released Sapphire Rapids Xeon Max, which can use in-package HBM memory as RAM and run without DDR5 modules installed. Of course, in Xeon Max we're talking about 32 GiB usable capacities...

Also, tools like memtest86/memtest86+ claim that they can't test 100% of the RAM capacity since they themselves use some RAM to hold the program in memory, so, with CAR, you could do something like holding memtest itself on Cache (Assuming it and its runtime memory needs fits) so you can potentially test the entire RAM.