coreboot Redundancy
Brief summary
coreboot redundancy is a feature that ensures that all stages of coreboot are duplicated, allowing for a safe fallback to a known-working version of the firmware in situations where one of the copies gets corrupted. It protects against bad firmware updates and increases overall reliability of firmware.
Redundant boot in coreboot is a feature that is designed to prevent accidental bricks due to a bad flash and provide a safe fallback in case something goes wrong, by ensuring that a CMOS reset is all that is needed to roll back to a working firmware copy.
Implement the proposal submitted to and reviewed by the coreboot community: https://mail.coreboot.org/archives/list/[email protected]/thread/C6JN2PB7K7D67EG7OIKB6BBERZU5YV35/
The feature shall be implemented in a way that allows it to be enabled only for selected platforms using Kconfig options. The initial development shall be done on the VP66xx platform only.
Does this apply to DTS? DTS does not support Protectli.
We do not design features for specific board, we design it for Dasharo in general. There is always some board integrated as a first one, but we expect to integrate this feature for others as well. Especially the ones from DPP, like MSI, ODROID, etc.
Current patch status can be previewed here:
https://review.coreboot.org/q/hashtag:%22top-swap-redundancy%22+(status:open%20OR%20status:merged)
So far, patches allowing building with separate BOOTBLOCK and TOP_SWAP regions have been merged, and the logic for switching between them based on a CMOS option attempt_slot_b is pending review.