coreboot
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coreboot component of Dasharo
This PR adds silicon initialization not covered by native coreboot support but done in FSP. It also contains various fixes, TXE BIOS flow and CBFS_VERIFICATION integration with TXE Secure Boot...
* Normalize defconfigs * Run upstream's lint tool (fix issues reported by its extended checks) * Re-generate Dasharo-related defconfigs and fail if any of the files have changed
updates: - [github.com/pre-commit/pre-commit-hooks: v4.4.0 → v5.0.0](https://github.com/pre-commit/pre-commit-hooks/compare/v4.4.0...v5.0.0) - [github.com/talos-systems/conform: v0.1.0-alpha.27 → v0.1.0-alpha.30](https://github.com/talos-systems/conform/compare/v0.1.0-alpha.27...v0.1.0-alpha.30)
These UPDs have to be set for PCH USB2.0 ports that are paired with CPU XHCI controller.
Synced with upstream version a bit. Also changed the power state after failure to match original behavior of the board. After these changes the board can boot DTS from USB...