32-bit riscv port

[sorear]

32-bit riscv (riscv32) implementations are fairly popular with amateurs and have some potential relevance in embedded computers, but our current "riscv" target only supports 64-bits. I have zero interest in copying the current 940kB riscv target into the 32-bit compiler, but after #755 becomes a reality I would like to look into the feasibility of sharing a single encoder between bitwidths (which would make little sense for arm or x86).