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Published 20 hours ago • verified publisher icon Bouni

kikit panel CPL file all over the place

Open whinis opened this issue 4 months ago • 6 comments

I think this is a regression of https://github.com/Bouni/kicad-jlcpcb-tools/issues/155. I submitted a 3x3 board and had my CPL rejected. It seems that its randomly selecting a reference designation for each part, leading to the placement being all over the panel rather than on one unit.

whinis avatar Apr 10 '24 11:04 whinis

Can you provide your generated files so that I can take a look at them?

Bouni avatar Apr 11 '24 09:04 Bouni

BOM-panel-3-3.csv GERBER-panel-3-3.zip CPL-panel-3-3.csv

whinis avatar Apr 11 '24 11:04 whinis

OK, I guess th eproblem is that the ref, SW1 for example occures on each pcb of the panel, ehich makes absolute sens (I've never done panels before, so I never thought about that). Can you provide the .kicad_pcb file or even better the complete prjetc files as well? I need to check what the API returns for all the footprints.

Bouni avatar Apr 17 '24 05:04 Bouni

https://gitlab.whinis.com/Whinis/sfp-media-buddy

whinis avatar Apr 17 '24 11:04 whinis

Is there a reason you did not include the panized version in th egit repo?

Bouni avatar Apr 18 '24 13:04 Bouni

I just generate it each time via kikit and the included kitkit json file

whinis avatar Apr 18 '24 17:04 whinis