CoreNeuron
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Set the initial values of ions properly in direct and file mode transfer
Description
Fixes issue with ion variables initial values not being in set in file mode transfer of data between NEURON and CoreNEURON. Even if this seems like an issue it doesn't seem to influence the behavior of some of the simulations I've tried.
Fixes #779
How to test this? It's pretty difficult to test this so bare with me. Add the following change to this branch:
diff --git a/coreneuron/mechanism/eion.cpp b/coreneuron/mechanism/eion.cpp
index 25422326..11b2e150 100644
--- a/coreneuron/mechanism/eion.cpp
+++ b/coreneuron/mechanism/eion.cpp
@@ -316,6 +316,7 @@ void nrn_init_ion(NrnThread* nt, Memb_list* ml, int type) {
int _cntml_padded = ml->_nodecount_padded;
pd = ml->data;
ppd = ml->pdata;
+ printf("nrn_init_ion %d %s conci %lf conco %lf charge %lf celsius %lf\n", type, nrn_get_mechname(type), conci0, conco0, charge, celsius);
// There was no async(...) clause in the initial OpenACC implementation, so
// no `nowait` clause has been added to the OpenMP implementation. TODO:
// verify if this can be made asynchronous or if there is a strong reason it
# build NEURON with CoreNEURON using master and this branch and compare the output of the following
git clone -b magkanar/debug_ions [email protected]:neuronsimulator/ringtest.git
<install_dir>/bin/nrnivmodl -coreneuron mod
mpirun -n 2 ./x86_64/special -mpi -python ringtest.py -dumpmodel
mpirun -n 2 ./x86_64/special-core --mpi -d coredat
You can also print the same string in NEURON and compare the results.
Test System
- OS: Ubuntu 20.04
- Compiler: GCC 9.3.0
- Version: master branch
- Backend:CPU
Logfiles from GitLab pipeline #40210 (:white_check_mark:) have been uploaded here!
Status and direct links:
- :white_check_mark: build:coreneuron:nmodl:nvhpc:omp
- :white_check_mark: build:coreneuron:nmodl:nvhpc:acc
- :white_check_mark: build:coreneuron:mod2c:intel
- :white_check_mark: build:coreneuron:nmodl:intel
- :white_check_mark: build:neuron:mod2c:nvhpc:acc
- :white_check_mark: build:neuron:nmodl:nvhpc:omp
- :white_check_mark: build:neuron:nmodl:nvhpc:acc
- :white_check_mark: build:neuron:mod2c:intel
- :white_check_mark: build:neuron:nmodl:intel
- :white_check_mark: test:coreneuron:mod2c:nvhpc:acc
- :white_check_mark: test:coreneuron:mod2c:nvhpc:acc:unified
- :white_check_mark: test:coreneuron:nmodl:nvhpc:omp
- :white_check_mark: test:coreneuron:nmodl:nvhpc:acc
- :white_check_mark: test:coreneuron:mod2c:intel
- :white_check_mark: test:coreneuron:nmodl:intel
- :white_check_mark: test:neuron:mod2c:nvhpc:acc
- :white_check_mark: test:neuron:nmodl:nvhpc:omp
- :white_check_mark: test:neuron:nmodl:nvhpc:acc
- :white_check_mark: test:neuron:mod2c:intel
- :white_check_mark: test:neuron:nmodl:intel