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AAM AMX instruction entries and AAD ADX instruction entries are wrong

Open Kashio opened this issue 4 years ago • 1 comments

The first entry which is for AAM has sec_opcd equal to 0A for no reason. The instruction doesn't rely on a secondary opcode just an immediate 8 bit value after the primary opcode.

The second entry which is for AMX and I'm not sure why it's there, according to the dtd file, it's a suggested mnemonic, it's not even an alias so I'm not sure what does it serve but it list the immediate 8 bit value source operand unlike the first entry of AAM which doesn't even list this source operand for some reason?

Same goes for AAD instruction.

Kashio avatar Sep 17 '21 22:09 Kashio

This is what I've been always fighting with. Intel never bothered to create formal strict syntax rules for the instruction set and the syntax changes in time. Long time ago, the imm8 operand was completely undocumented. The manuals that this reference is based on (15 years back) say: D4 Ib (no mnemonic). That's why someone invented the AMX mnemonic for arbitrary imm8.

In the D40A AAM, from the strict formal point of view, the 0A is actually a "fixed immediate operand". I didn't want to introduce yet another operand type just because AAM and AAD so I went with sec_opcd. This should be fine because the Intel manual merely says D40A AAM, without any mention the 0A part is actually an immediate value.

You're right, the newer manuals say D4 ib AAM imm8 and the reference should be updated now.

By the way, AAM imm8 doesn't make sense because the first letter A stands for "ASCII", referring to the immediate value 0A. When it's different from 0A, the first letter should disappear. So it should be AM, which is too short. That's why AMX makes sense to me.

BarebitOpenSource avatar Sep 23 '21 07:09 BarebitOpenSource