IPA verifier parallelisation

[maramihali]

Currently the IPA native verifier is parallelised which is desirable in the context of fast verification (e.g. for confirmation time). We don't have a mechanism yet to support parallelisation in circuits so we need to have a way to preserve the native parallelisation of IPA verifier when run from the recursive verifier instantiated with the simulator. Eventually, it would be ideal to find a way to parallelise the recursive verifier as well.