Alex Voicu

> We've decided to suspend work on this for now: if AMD hints at having experimental support for automatic offloading (or something like it) then it will definitely be worth...

@sriharikarnam can you please try to switch the guards so that the body of the functions is what is guarded and not the outright signature (i.e. move the #if /...

@sriharikarnam that is because from CUDA8 onward atomicAdd for doubles is provided by the CUDART itself, see: http://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#atomicadd. So you need an outer guard for the CUDA version and CUDA...

Have you actually verified that the byte two-byte load instructions you are using exist on the ISAs you expect them to exist? If you have, perhaps you want to check...

> LLVM Buildbot has detected a new failure on builder `sanitizer-ppc64le-linux` running on `ppc64le-sanitizer` while building `clang,llvm` at step 2 "annotate". > > Full details are available at: https://lab.llvm.org/buildbot/#/builders/72/builds/839 >...

> CI looks unhappy, mlir also seems to need updates: > > MLIR :: Target/LLVMIR/llvmir.mlir MLIR :: mlir-cpu-runner/x86-varargs.mlir Done.

Thank you everyone for the reviews.