Remarks/Improvement about PCB routing and components for future revision

[bvernoux]

I have just checked quickly the board (with Eagle) and following stuff could be improved for final version (about USB remarks 1/2/3 even if only USB 2.0FS is used and those rules are required for USB 2.0HS it is good to apply them) :

1. For USB: Route the differential pairs together.
2. For USB: USB signal shall be not under Crystal and to shall be as far as possible from quartz(X1).
3. For USB: Route the differential pairs (D+/D-) over unbroken ground planes or floods and with same size if possible.
4. Add a ferrite bead on USB VBUS (especially for analog part to avoid parastic problems) like Murata BLM21PG221SN1D FERRITE CHIP 220 OHM 2000MA 0805.
5. Add ESD protection on USB D+/D- (something like NXP PRTR5V0U2X DIODE ESD PROTECTION SOT143B)
6. Some PIC VDD pins have no decoupling capacitor (at least 100nF).
7. Decoupling capacitor(10nF) on VBUS/Power part C25,C28,C27,C26 are too far from the VDD pin (they shall be as close as possible).
8. VBUS (5V) signal have some wire less than 8mil could be problematic for voltage drop (R=710mOhm) and with an Imax of 0.64A and a total len of about 286mm (computed with Eagle6 length-freq-ri.ulp).
9. 3V3 signal have some wire less than 8mil could be problematic for voltage drop (R=1257mOhm) and with an Imax of 0.64A and a total len of about 506mm (computed with Eagle6 length-freq-ri.ulp).
10. 3V3 power from C18 to R23 could be simplified to avoid parallel 3V3 wire.
11. Components placement could be optimized to avoid all those vias and maybe a switch to 4 layers will be a must for noise immunity (especially for analog part) for a simplified routing and smaller board.
12. You should apply some standard Eagle DRU rules for cheap PCB on the board like http://www.seeedstudio.com/document/rar/SeeedStudio_2layer_DRU_no_angle_20140221.rar or ftp://imall.iteadstudio.com/PCBs/ITEADstudio_DRC.zip as there is lot of clearance problems.

[tonynaggs]

Thanks for the comments, this all sounds good for helping quality & reliability. I can't speak for Zac, but I guess some of the USB signal issues are inherited as he started out by adapting the UBW (USB Bit Whacker) http://www.schmalzhaus.com/UBW32/

[tonynaggs]

I am able to view the schematic with the free version of Eagle 6.5.0 Light. :-)

It would be helpful to be able to measure the received clock amplitude, perhaps with a peak detector and sample & hold circuit to the analog input on the PIC. This should simplify deciding the values to program into the digital pots as proximity to the field varies.

Minor comments on the schematic: please update the USB connector description to reflect the change mini-USB on the PCB; maybe show the external coil connected to JP11; it could be helpful to label the major portions of the circuit eg PIC & digital, RFID analog, coil calibration; the circuit would be a little easier to follow if the SN74LVC2G17 was depicted as Schmitt Triggers. Maybe add a readme explaining the opional not fitted components?

The board itself looks great, double sided silk screens, lots of test point labels, just one minor comment but one of the joints on the 8MHz crystal looks a little dry. (I think these are vulnerable to mechanical stress due to their height, I had to resolder loose crystals on some Defcon 20 badges.)

[AdamLaurie]

https://github.com/ApertureLabsLtd/RFIDler/wiki/plotting

As per yesterday's commits, plotting and pot setting also now brought to you in volts...

Ask, and ye shall receive... :)