CMSIS_5
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Issues with new ARMv8 MPU attributes
I just noticed the new MPU_ATTR_NORMAL_OUTER_NON_CACHEABLE etc defines.
A few issues with these, in descending order of importance:
- The
TRtransient indication is inverted. Bit 3 needs to be set for transient. - The
0bbinary prefix requires a very recent language standard or a compiler extension. - Shouldn't they have an
ARM_prefix to match surrounding defines? - But is the
OUTER_andINNER_necessary?
And as an aside, just for anyone happening to search and end up here - it's not specified anywhere what the "transient" flags of the default memory map are. Apparently the default regions are transient in the M55, which surprised me.
Would you mind raising a PR with your proposed changes?
Perhaps switch over to ARM-software/CMSIS_6 and we leave it unchanged here. Adding ARM_ prefix might be a good idea but would break backward compatibility.