ARM-software
Fix: Issue of SCB_DisableDCache(),SCB_InvalidateDCache(),SCB_CleanDCache() functions when compiling with -O0
The variables 'ccsidr', 'sets' and 'ways' needs to be defined as 'register uint32_t' to avoid issues when using the -O0 flag.
These variables are used in the 'do/while' which invalidates/cleans the cache, however, by using -O0 flag (On STM32H7), the compiler does not exclude them from the cache, so the system invalidates/cleans also them and the result is to end-up in an infinite loop.
Relying on the register keyword is not a solid solution. It is considered only a hint that compilers are allowed to interpret as they like. The only thing is guarantees from the C language specification is automatic duration, no linkage, and the variable's address cannot be taken (the latter being the only difference from an auto variable).
The only reliable solution is to rewrite these cache maintenance routines using inline assembly.
This topic was already discussed in https://github.com/ARM-software/CMSIS_5/issues/620. I think there is a better solution then adding the register keyword which is obsolete with C++17. Compare https://github.com/ARM-software/CMSIS_5/pull/1426
