Juncheng Yang
Juncheng Yang
OK, thanks!
Hi @haomactracy good catch, I believe it is a bug, but seg_feature is not used anymore, so it does not affect. If you want to send a PR, I am...
Hi @Voultapher, if I remember correctly, RRIP-based eviction policies are for hardware caches (set-associative caches). If one wants to implement them in software (non set-associative) caches, it will incur O(logN)...
I am not aware of any work compare hardware cache and software cache. This is kindly separately community. I am not a hardware cache expert, so my understanding is limited....
Hi @jeromefroe, would you recommend we add a new struct for the SIEVE cache or add as an option to LRUCache? ``` let mut cache = LruCache::new(NonZeroUsize::new(2).unwrap(), useSieve=true); ``` or...
Just realize that using the option would break existing code since we cannot set a default value for the `use_sieve` parameters. Any suggestion?
I think it only supports Python 2
From my discussion with @beinan, the use case is to cache fixed-size large blocks (e.g., 1 MB) with strong interests in TTL and NVMe support. They are mostly throughput bound...
Yeah, good catch on misalignment. For NVME support, we may want to keep all metadata in DRAM. I think they are consumed without leaving the box. Because the consumer is...
no, it is not common, can you show the command you use?