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verified publisher icon 1801BM1

vm2: fix prefetch bug

Open 1801BM1 opened this issue 4 years ago • 0 comments

It was reported the opcode prefetch bug is not completely fixed.

If VM2_CORE_FIX_PREFETCH is nonzero the PC2 prefetch bug fix is applied (not completely works, as it was found).

Original 1801BM2 processor contains microcode bug happening at the following conditions: - two operands PDP-11 instruction is being executed - source has addressing method @PC (field value 17 octal) - destination does not involve PC (dst register field !=7) - no extra instruction words are used by destination (no E(Rn),@E(Rn)) - Q-bus is slow and opcode prefetch is not completed before microcode starts source field processing and fetching the source data (slow nRPLY/nAR)

1801BM1 avatar May 15 '21 20:05 1801BM1