lazymio

In most cases, the work is to write the value to the register or expose relevant helpers to users if any. For `scr_el3`, it could be probably `env->cp15.scr_el3`.

Oh wait, I think the coprocessor you would like to write should be covered by `UC_ARM64_REG_CP_REG`?

Looks like a bug, noted.

`UC_REG_GS_BASE` is writing to `gs.base` while `UC_REG_GS` actually writes to GS.

> Yes, that's the intended behavior for long mode. Note that switching the order of the prefixes will result in a successful run, but the order shouldn't matter here. I...

That should be intended, no? Note `gs.base` is indeed used in many places.

I still don't get it. ``` In [25]: from capstone import * In [26]: cs = Cs(CS_ARCH_X86, CS_MODE_64) In [27]: list([f"{p.mnemonic} {p.op_str}" for p in cs.disasm(b"\x65\x2e\x00\x00", 0)]) Out[27]: ['add byte...

Could you attach an `lldb` to show the actual fault reason?

> This improves binding safety. Bindings can verify that they are using (or being passed) a large-enough buffer to read any given register. > This reduces bugs when bindings don't...

Any reproduction script?