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Published 20 hours ago • verified publisher icon ucb-bar

Queue is not getting synthesized

Open preyas3359 opened this issue 9 years ago • 0 comments

Hi,

I am using Synopsys tool to synthesize a verilog netlist generated from Chisel implementation. Tool is not able to map any library cells to reg_files of Queue creating sequential generated structures (named SEQGEN in synthesized netlist)

PS:I have checked completeness of library used.

Has anybody seen similar issue?

Thanks & Regards, Preyas

preyas3359 avatar Oct 19 '16 21:10 preyas3359