verilator topic
async_fifo
A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog
wbi2c
Wishbone controlled I2C controllers
zbasic
A bare bones, basic, ZipCPU system designed for both testing and quick integration into new systems
croyde-riscv
A barebones 64-bit RISC-V micro-controller class CPU, implementing the I(nteger), M(ul/div), C(ompressed) and K(ryptography) extensions.
FakePGA
Simulating Verilog designs on a microcontroller
verilator_xilinx
Re-coded Xilinx primitives for Verilator use
Quasar
Quasar 2.0: Chisel equivalent of SweRV-EL2
ICS-2021Spring-FDU
Introduction to Computer Systems (II), Spring 2021