de10-nano-riscv
                                
                                
                                
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                        A RISC-V SoC ( Hbird e203 ) on Terasic DE10-Nano
DE10-NANO-RISCV
A RISC-V SoC on Terasic DE10-NANO
- [x] DE10-Nano
 - [ ] T-Core (As far as I known, terasic has ported the E203 to T-Core,which is a sweet board)
 
Description
- Hbird E203 form Nuclei Technology
 - Ported the code form LiChee-Tang
 - 16Mhz clock input now(can works higher)
 - 6927 LAMs and about 65Kb block ram now (maybe less)
 - mask-rom boot default, and jump to itcm ram 0x80000000
 - LED0 and LED2 blink default
 
Works
- [x] change the pll and ram ip for intel FPGA
 - [x] Write the LED-Blink ASM Code for E203
 - [x] Build the binary and make a mif(hex) file for itcm ram
 - [x] some timing check by signaltap and verdi simulation
 - [x] write the binary to itcam hex tools
 - [x] add led C code
 - [x] add hbird-sdk runtime (testing)
 - [x] add a simple C-based RISC-V simulator that can run led blink binary
 - [x] update the ftdi script for e203 debug with ft2232hl tools (upload the binary to itcm, then run openocd and gdb)
 
Build the itcm ram hex
02.led_c
riscv-none-embed-gcc -march=rv32i -mabi=ilp32 -Tlink_itcm.lds  -nostartfiles -o led.elf start.S main.c
riscv-none-embed-objcopy -O binary led.elf led.bin
../../../tools/bin2ihex led.bin > led.hex
hbird-sdk
    cd de10-nano-riscv/hbird-sdk
    export RISCV_OPENOCD= path to openocd (eg./opt/xpack-openocd-0.10.0-14/bin)
    export RISCV_PATH= path to risc-v gcc path (eg./opt/riscv-none-gcc/7.2.0-2-20180111-2230)
    make dasm PROGRAM=hello_world DOWNLOAD=itcm USE_NANO=1 NANO_PFLOAT=0
    make upload PROGRAM=hello_world DOWNLOAD=itcm
    make run_openocd PROGRAM=hello_world DOWNLOAD=itcm
open a new terminal
    cd de10-nano-riscv/hbird-sdk
    export RISCV_OPENOCD= path to openocd (eg./opt/xpack-openocd-0.10.0-14/bin)
    export RISCV_PATH= path to risc-v gcc path (eg./opt/riscv-none-gcc/7.2.0-2-20180111-2230)
    make run_gdb PROGRAM=hello_world DWONLOAD=itcm
(gdb)
    break main
    jump main
    
    l
    n
here is the riscv-none-gcc link
run simulation with verilator
brabect1's e200_opensource repo
- install verilator and gtkwave
 - make build test-rv32ui-p-xori cflags='-DVCDTRACE=1'
 - gtkwave dump.vcd