stnolting comments

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                                            stnolting

🧪 [linty] initial setup (preliminary)

> Actually, -L neorv32 is not necessary and you can remove it. :+1: > Here's the doc: https://yosyshq.readthedocs.io/projects/yosys/en/latest/cmd/verific.html Thanks a lot! There is still a problem with hierarchy elaboration: ```...

🧪 [linty] initial setup (preliminary)

> Did you manage to get the BugFinder output log? Unfortunately not yet. I have already checked the permissions, but everything seems to be correct. Maybe we should just add...

🧪 [linty] initial setup (preliminary)

Hmm... I have no idea to handle this within GitHub actions right now.. :/ Anyway. Linty fails since we have changed the top entity. In the previous (working) top entity...

🧪 [linty] initial setup (preliminary)

`run` and `uses` cannot be used within the same job step. I just tested to use a testbench as top entity - that also failed. Now I am using another...

🧪 [linty] initial setup (preliminary)

> Here's the fix: Thank you very much! I'm quite busy at the moment, but I'll come back to this ASAP (weekend)! 🙈

🧪 [linty] initial setup (preliminary)

> Here's the fix: Works like a charm! thank you very much! I'm still trying to set the processor top as top for the elaboration. However, it seems like the...

🧪 [linty] initial setup (preliminary)

Hmm, maybe this is just a code issue... ``` [00000.140434] 58. Executing hlp_synthesized_objects pass... [[VHDL-1769;./../rtl/core/neorv32_top.vhd;25;5;25;20]] VERIFIC-ERROR [VHDL-1769] ./../rtl/core/neorv32_top.vhd:25: formal generic 'clock_frequency' has no actual or default value [[VHDL-1067;./../rtl/core/neorv32_top.vhd;22;8;22;19]] VERIFIC-INFO [VHDL-1067]...