stm32f7xx-hal
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stm32-rs
A Rust embedded-hal HAL for all MCUs in the STM32 F7 family
I've found it useful in the past if the UART object implements `core::fmt::Write`. This would mean you can write: ```rust let serial = Serial(...); writeln!(serial, "Hello, {}!", name).unwrap(); ``` I...
I found more update version of library - https://github.com/dtjones190/stm32f7xx-hal. Could you ask me about plans to update with common state such as stm32f4xx-hal, I can create PR based on upper...
Follow up issue from #66 The following config for SPI1 is not available on every part in the F7 family: ``` SCK: [ gpio::gpiog::PG11, ], MISO: [ gpio::gpiog::PG9, ], MOSI:...
The blocking embedded-hal traits are quite useful but as far as I can tell, this HAL doesn't opt-in to them.
I believe that my original design for the SPI API isn't quite optimal. The current architecture works well enough for non-DMA uses, and I've managed to make it work with...
When I originally submitted the DMA API, I couldn't quite figure out how to support multiple DMA streams per peripheral instance. I must have gotten less stupid since then, because...
Fresh take on https://github.com/stm32-rs/stm32f7xx-hal/pull/171, rebased on latest changes
The first (few?) draw requests after a large rectangle will be garbled. Until the "safer DMA transfers" have landed, it may be better to block the call if a transfer...
Development board STM32F723-DISCO When I compile example examples/blinky-timer-irq.rs, I get the error: > error[E0277]: the trait bound `stm32f7xx_hal::interrupt: Nr` is not satisfied --> src\main.rs:92:44 | 92 | cortex_m::peripheral::NVIC::unmask(Interrupt::TIM2); | ----------------------------------...
