riscv-v-spec About EXT

About EXT_ZVFH

Open Liuziying04 opened this issue 2 years ago • 2 comments

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Vector floating-point instructions with an accuracy of 16 bits require support for EXT_ZVFH, but no corresponding instruction set is found in MISA. So what registers or where does EXT_ZVFH support?

Jun 14 '23 01:06 Liuziying04

zvfh enables SEW=16 for vector FP instructions execution

Jun 14 '23 02:06 furuame

Correct, there is no misa bit for Zvfh. We ran out of bits!

Jun 14 '23 03:06 nick-knight

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About EXT_ZVFH

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