Which exceptions and interrupts can be deligated?

[MikeOpenHWGroup]

The medeleg and mideleg CSRs indicate which exceptions can be delegated to non-machine mode code. The User Manual indicates that all 32-bits of these CSRs are R/W which implies that all interrupts and exceptions can be delegated. It seems unlikely that this is correct.

Please update the User Manual to indicate which exceptions and interrupts can be delegated, and the R/W bits of the medeleg and mideleg CSRs.

[JeanRochCoulon]

@ASintzoff, as exception an sinterrupt verificator, you should have a clearer view than me on this point ! I assign the point to you

[MikeOpenHWGroup]

Hi @ASintzoff and @JeanRochCoulon, I just noticed that this Issue has both CV32A60AX and notCV32A65X labels. Is that correct?

[ASintzoff]

We should not be confused by the similarity between CV32A60AX label and CV32A60X configuration name.

There are few issues with CV32A60AX labels. Maybe, it will be reused for the configuration with the same name.