Mupen doesn't respect alignment restrictions of some MIPS instructions

[bkimmett]

The MIPS LW instruction expects the memory address used to be aligned (that is, a multiple of 0x4). Through an accident, I ended up running the following code on Mupen in a Paper Mario romhack:

LUI    S0, 0x800E
ADDIU  S0, S0,  0xC070
LW     A0, 0x97 (S0)

This code causes the system to try and read from 800DC107, which isn't word-aligned, and should cause the game's crash screen to display (implying an exception was thrown on the N64). However, on M64P, the game continues silently, suggesting the alignment requirement isn't checked.

If this isn't checked on LW, I would imagine it isn't checked on SW, LH, SH, or other relevant load and store instructions.

[m4xw]

Its super unintuitive, but iirc the silicon just ignored the last bits (i am sure it does for DMA at least). Its "unsupported" in the sense that it will just pretend those not existing. I am curious about that behaviour on real hw tho and act accordingly