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Add a pseudoinstructions test suite
Just as we have a self-checking test suite for RV32/64IMC, it would be nice to also have a full pseudoinstruction test suite to ensure corectness.
Hey @mortbopet I'm interested in contributing to this. I found a list of pseudo-instructions here: https://github.com/riscv-non-isa/riscv-asm-manual/blob/master/riscv-asm.md#-a-listing-of-standard-risc-v-pseudoinstructions
Should I use this as reference to develop the pseudo-instruction suite?
That would be a decent reference! Not all of them are implemented, however, so the list of instructions to cover is probably more easily found by searching for things like this.