ibex-demo-system
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About SRAMInitFile
SRAMInitFile is a localparam defined in ibex_demo_system.sv. I'm sure how to use that. Is this can initial u_ram in implementation phase of vivado, or this just for simulation with verilator ? Also, I see BRAM utilization resources of vivado changes when I change the size of ram_2p, can we initialize the data inside the BRAM after performming the implementation in vivado or something inside the bitstream, not use the application code (i.e C/C++) to control a cores (PS) to write to BRAM. Thanks
The SRAMInitFile is used by Vivado to initialize the block rams. It takes a VMEM file which is generated in the software directory.
Yeah, but does it means: I put the vmem file in SRAMInitFile, and then generate bitstream. No other cmd needed for loading the code in the software directory ?. So the workflow become load bitstream to fpga only ? (b/c the application is in the ram)
Yes, that's correct. If you don't want to rebuild the bitstream and just want to update the RAM content you can use these instructions: https://github.com/lowRISC/ibex-demo-system?tab=readme-ov-file#loading-an-application-to-the-programmed-fpga
Oh, and how about getting vmem, in case I have the ./sw/c/build/demo/hello_world/demo, how to convert it to .vmem file (b/c I don't change the RAM file content, I just use only the hello_world demo, I don't wanna use ./util/load_demo_system.sh halt ./sw/c/build/demo/hello_world/demo).
Ah good point, you can generate this by changing CMakeLists file content to be the same as: https://github.com/lowRISC/sonata-system/blob/main/sw/legacy/demo/hello_world/CMakeLists.txt
Closing this issue because of inactivity, please feel free to re-open if you have further enquiries.