Fix support for 64-bit atomics on 32-bit SparcV9

[brad0]

// TODO: we ought to be able to support 64-bit atomics on 32-bit sparcv9, // but it hasn't been implemented in the backend yet.

https://github.com/llvm/llvm-project/pull/81655

[brad0]

cc @koachan

[brad0]

@koachan

[koachan]

Noted, but I think it'd be better to fix the issues for 64-bit target first for now...

[brad0]

Noted, but I think it'd be better to fix the issues for 64-bit target first for now...

I understand what you mean in general. This is SparcV9, this is relevant for Solaris/sparcv9 which uses 64-bit kernel and such, 32-bit userland. I mean as opposed to the 32-bit target V7 / V8.

[brad0]

@koachan With the V8+ support I wonder if this can be fixed.

[koachan]

Probably need to teach LLVM about the existence of 64-bit registers first? IIRC the support so far was only limited to recognizing/emitting the correct flags (and parsing inline asm), but there's still no codegen changes.

[brad0]

@koachan Ah, good point. I was not aware of that.