[RISCV] Store multiple value to same memory address when calling llvm.bitreverse.nxv2i64 intrinsic

[Yunzezhu94]

When running following case with attribute -march=rv32imacv:

declare <vscale x 2 x i64> @llvm.bitreverse.nxv2i64(<vscale x 2 x i64>)

define i32 @main() {
    %1 = insertelement <vscale x 2 x i64> zeroinitializer, i64 3, i64 3
    %2 = tail call <vscale x 2 x i64> @llvm.bitreverse.nxv2i64(<vscale x 2 x i64> %1)
    %3 = extractelement <vscale x 2 x i64> %2, i32 3
    %4 = trunc i64 %3 to i32
    ret i32 %4
}

It generates codes:

        sw	a0, 12(sp)
	lui	a0, 1044480
	sw	a0, 8(sp)
	lui	a0, 61681
	addi	a0, a0, -241
	sw	a0, 12(sp)
	sw	a0, 8(sp)
	lui	a0, 209715
	addi	a0, a0, 819
	sw	a0, 12(sp)
	sw	a0, 8(sp)
	lui	a0, 349525
	addi	a0, a0, 1365
	sw	a0, 12(sp)
	sw	a0, 8(sp)

and following vlse instructions can not get correct value.

[llvmbot]

@llvm/issue-subscribers-backend-risc-v

[wangpc-pp]

This issue has already been fixed in 9d22b54d6b214e174b786316ccc9308aa7dd7be3.