[X86] Spilt mfence like features from SSE2

[phoebewang]

As commented in X86Subtarget.h:

  /// Use mfence if we have SSE2 or we're on x86-64 (even if we asked for
  /// no-sse2). There isn't any reason to disable it if the target processor
  /// supports it.
  bool hasMFence() const { return hasSSE2() || is64Bit(); }

We need to find a way to split these mfence/clflush/sfence/lfence etc. instructions from SSE2 in case they are disabled together with vector support. I'd like to add something like sse2_novec etc. and set them when using -msse2 -mgeneral-regs-only.

[llvmbot]

@llvm/issue-subscribers-backend-x86