[SYCL][FPGA] Implement task_sequence header, properties, and add new fpga_cluster kernel property

[bowenxue-intel]

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Implement task_sequence header, task_sequence properties, and fpga_cluster kernel property according to the spec updates https://github.com/intel/llvm/pull/6348 (almost ready to be merged) Header

• Refactor invocation and response capacity to be on the Create intrinsic, so Async and Get do not take in respective argument
• Remove max_outstanding argument of Create intrinsic
• Add pipelined and fpga_cluster arguments to Create intrinsic
• Async, Get, and Release intrinsic now accept the ID returned from the Create intrinsic, and do not take in object pointer or task function pointer arguments
• Task Sequence accepts properties

Task Sequence Properties

• Convert invocation and response capacity from template parameters to properties
• Add balanced property to remove Get intrinsic loop in destructor

FPGA Kernel properties

• Add fpga_cluster property
• Support fpga_cluster and pipelined property for task sequence

[github-actions[bot]]

:warning: C/C++ code formatter, clang-format found issues in your code. :warning:

You can test this locally with the following command:

git-clang-format --diff 90f03ee7c82ed9c6f2e3c34d300e6c4b18fe1d67 f1ee83f32085094204d6715f38bdc664cc8f1906 -- sycl/include/sycl/ext/intel/experimental/task_sequence/properties.hpp sycl/include/sycl/ext/intel/experimental/task_sequence/task_sequence.hpp llvm/lib/SYCLLowerIR/CompileTimePropertiesPass.cpp sycl/include/CL/__spirv/spirv_ops.hpp sycl/include/sycl/ext/intel/experimental/fpga_kernel_properties.hpp sycl/include/sycl/ext/oneapi/properties/property.hpp sycl/test/extensions/properties/properties_kernel_fpga.cpp

View the diff from clang-format here.

diff --git a/sycl/include/CL/__spirv/spirv_ops.hpp b/sycl/include/CL/__spirv/spirv_ops.hpp
index 0419bc974f..6ddac0ebf6 100644
--- a/sycl/include/CL/__spirv/spirv_ops.hpp
+++ b/sycl/include/CL/__spirv/spirv_ops.hpp
@@ -995,8 +995,8 @@ __spirv_ConvertFToBF16INTEL(float) noexcept;
 extern __DPCPP_SYCL_EXTERNAL float
     __spirv_ConvertBF16ToFINTEL(uint16_t) noexcept;
 
-__SYCL_CONVERGENT__ extern __DPCPP_SYCL_EXTERNAL __SYCL_EXPORT
-    __ocl_vec_t<uint32_t, 4>
+__SYCL_CONVERGENT__ extern __DPCPP_SYCL_EXTERNAL
+    __SYCL_EXPORT __ocl_vec_t<uint32_t, 4>
     __spirv_GroupNonUniformBallot(uint32_t Execution, bool Predicate) noexcept;
 
 // TODO: I'm not 100% sure that these NonUniform instructions should be

[bowenxue-intel]

Please add a clang test for the spirv type genrated. You may modify the one from #12820 if that is easier.

Added. There are some issues with my clang environment related to finding the correct gcc directory that is preventing me from using llvm-lit directly to check whether the LIT tests are passing. I'm basing the test CHECK conditions on manual clang++ compiles so the tests may require a bit more tweaking.

[bowenxue-intel]

One of the failing LIT tests seems related to the addition of "#include task_sequence.hpp" to sycl.hpp, and the async(ArgsT... Args) function's "Args" param is unused if SYCL_DEVICE_ONLY is undefined... Any ideas on how to get by this?

[bowenxue-intel]

@intel/dpcpp-tools-reviewers @intel/llvm-reviewers-runtime @sergey-semenov Can I get a review for this PR? Aiming to get this in next week to give ample time to test FPGA backend integration.

[bowenxue-intel]

@intel/dpcpp-tools-reviewers Can someone please review this PR? This is needed for the FPGA team's next release.

[bowenxue-intel]

@intel/llvm-gatekeepers PR has been fully approved, please merge whenever possible.

[steffenlarsen]

@intel/llvm-gatekeepers PR has been fully approved, please merge whenever possible.

There seem to be compilation issues.

[bowenxue-intel]

@intel/llvm-gatekeepers PR has been fully approved, please merge whenever possible.

There seem to be compilation issues.

Apologies, bad attempt after resolving the merge conflict through Github UI. Should be fixed now.

[aelovikov-intel]

Tests introduced here have been failing for more than a week in post-commit. @bowenxue-intel , @dm-vodopyanov , please FIX ASAP.

@dm-vodopyanov , I want to remind that it's the gatekeeper's responsibility to watch for post-commit failures after PR is merged and work with author to address any failures.

  SYCL :: TaskSequence/concurrent-loops.cpp
  SYCL :: TaskSequence/in-order-async-get.cpp
  SYCL :: TaskSequence/mult-and-add.cpp
  SYCL :: TaskSequence/multi-kernel-task-function-reuse.cpp
  SYCL :: TaskSequence/producer-consumer.cpp
  SYCL :: TaskSequence/struct-array-args-and-return.cpp