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Published 20 hours ago • verified publisher icon intel

AMX example clarification

Open TharinduRusira opened this issue 2 years ago • 1 comments
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Hi, Why do we configure 4 tiles (in total, i.e., i=0, i=1, i=2, i=3) here when the computation only needs 3? https://github.com/intel/AMX-TMUL-Code-Samples/blob/e4029b9184bac98ecb0c4472bc883bccc190933b/src/test-amxtile.c#L46

TharinduRusira avatar May 09 '23 15:05 TharinduRusira

Yes, I would also like to know. Or is there something special about tmm0?

henkjan-sneller avatar May 25 '23 08:05 henkjan-sneller