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**Describe the bug** Running a SYCL program on AMD GPU results in it crashing with the following error: ``` Memory access fault by GPU node-4 (Agent handle: 0x215c1f0) on address...
DPC++ with HIP AMD backend requires to specify a target architecture via `-Xsycl-target-backend --offload-arch=gfx90a`. This means that the code should be compiled for each architecture which may be a problem...
This patch makes `cuda_piextKernelSetArgMemObj` throwing an exception instead of `std::terminate`. This allows to continue the SYCL-CTS execution in case of tests using unsupported channel types, see https://github.com/intel/llvm/issues/2119#issuecomment-1201548912.
**Build compiler** git clone https://github.com/intel/llvm Hash: b00fb7c Includes: #1990, #1977 python /localdisk2/ws/againull/sycl/llvm/buildbot/configure.py --cuda -o /localdisk2/ws/againull/sycl/build python /localdisk2/ws/againull/sycl/llvm/buildbot/compile.py -o /localdisk2/ws/againull/sycl/build **Build accessor CTS tests** git clone https://github.com/KhronosGroup/SYCL-CTS.git Hash: 9cbe1a719b25c269ef78a2ee08f2e5ed12a1cc6d Applied: KhronosGroup/SYCL-CTS#52...
The following PR introduced an implementation of assert for HIP * https://github.com/intel/llvm/pull/6424 And the assert tests were re-enabled in: * https://github.com/intel/llvm-test-suite/pull/1083 Locally none of the tests were failing so we...
Running into this error while using the latest version of compiler with hip backend: /opt/compiler/llvm/clang/test/Driver/Inputs/debian_per_target_tree/usr/lib/llvm-14/lib/clang/14.0.0/lib/x86_64-linux-gnu/libclang_rt.builtins.a: file not recognized: File truncated Please provide a solution.
**Describe the bug** Default-constructed event doesn't follow SYCL 2020 specification. Here is default constructor description from the table 33 (with my **highlighting** of relevant part): "Constructs an event that is...
**Describe the bug** I'm building SYCL-CTS using DPC++ with NVPTX target support and building of the `test_vector_swizzles` fails with following error: ``` ptxas fatal : Unresolved extern function '_Z18__spirv_AtomicIAddPyN5__spv5Scope4FlagENS0_19MemorySemanticsMask4FlagEy' ```...
This is a general fix for https://github.com/intel/llvm/issues/6055. CUDA device interop is not available yet but a corresponding fix will be added to the CUDA specialization of `make_device` in https://github.com/intel/llvm/pull/6202 shortly....
