Graphical-Micro-Architecture-Simulator

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Problems with C & V flags when using the SUBS instruction

1

Hi, I have encountered issues that arise from the setting of the C and V flags when trying to use conditional branches (B.HI and B.LE) The sequence movz x1, #36...

4dvpitts

BL writes the target PC address to LR instead of the actual return address

6

It appears that rather than writing PC +4 to the LR, the tool instead writes the address of the function to LR. This causes functions to loop endless rather than...

bobbirrer

The list of the features can be found in this readme: https://github.com/simdeistud/LEGv8-Simulator/blob/NewFeatures/README.md

simdeistud

wrong value of MemWrite signal?

1

I assembled and executed a program with the lone instruction `STUR X1, [X2, #20]` In the graphical output, the `MemRead` signal is 1 and the `MemWrite` is 0. Shouldn't `MemWrite`...

aaarbk

This pull request contains the following 3 items: 1. A fix for the incorrect implementation of the BL instruction 2. A fix for the incorrect implementation of setting the flags...

simdeistud

MOVZ & MOVK

1

717 registerFile[destReg] = immediate

Kyle-Mitchell

Fixes #4 1. Fixed an issue where SUBS instructions did not result in the correct V flag 2. Fixed an issue where ADDS and SUBS instructions did not result in...

isaacy2012