code-cookbook

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https://docs.oracle.com/cd/E19504-01/802-5880/6i9k05dhg/index.html

# Simple makefile for compiling a program from
# two C source files.  

.KEEP_STATE

functions: main.o data.o 
         cc -O -o functions main.o data.o 
main.o: main.c 
        	cc -O -c main.c 
data.o: data.c 
         cc -O -c data.c 
clean: 
        	rm functions main.o data.o

$ make 
cc -o functions main.o data.o 
cc -O -c main.c 
cc -O -c data.c 

With flags

# Makefile for compiling two C sources 
CFLAGS= -O 
.KEEP_STATE:

functions: main.o data.o 
          $(LINK.c) -o functions main.o data.o 
main.o: main.c 
          $(COMPILE.c) main.c 
data.o: data.c 
          $(COMPILE.c) data.c 
clean: 
         	rm functions main.o data.o

Cheatsheet reference?

Implicit rules and dynamic macros

 make maintains a set of macros dynamically, on a target-by-target basis. These macros are used quite extensively, especially in the definitions of implicit rules. It is important to understand what they mean.
Note -

Because they are not explicitly defined in a makefile, the convention is to document dynamic macros with the $-sign prefix attached (in other words, by showing the macro reference). 

$@

    The name of the current target.

$?

    The list of dependencies newer than the target.

$<

    The name of the dependency file, as if selected by make for use with an implicit rule.

$*

    The base name of the current target (the target name stripped of its suffix).

$%

    For libraries, the name of the member being processed. See "Building Object Libraries " for more information.