Ivan Grokhotkov

AFAIK we haven't tested this component on any of the Micron chips. Micron support was contributed by @UnTraDe in https://github.com/espressif/idf-extra-components/pull/327. I guess @UnTraDe used it successfully, maybe there is something...

Okay, we'll order some boards with MT29 chips, might take some time (worst case, 2 weeks) to get them. In the meantime perhaps you could do the test I have...

> I did the tests you mentioned, I used the spi_nand_flash_read_sector function to see if it wrote correctly to the sectors. The thing does not return any errors. Could you...

I don't think any special handling is needed for the plane index. The driver is sending a 16-bit block address to the flash chip: - Three MSBs (15-13) are ignored...

Hi @mttcarbone, thank you for the logs you provided. I was able to reproduce the issue with MT29F2G chip. As you have suspected, the dual plane memory organization does require...

Yeah, you need to modify all 4 functions (also dhara_nand_is_bad and dhara_nand_read). You can check my draft changes over here: https://github.com/espressif/idf-extra-components/pull/397/.

@mttcarbone After looking at the code again, I have realized there are still _at least_ two issues remaining: - dhara_nand_mark_bad also has to be modified to adjust the write address...

There is one ini-related component contributed by @leeebo already: https://components.espressif.com/components/leeebo/esp-inih. (Note, however, the version is 0.0.2, and it hasn't been updated with the latest [upstream releases](https://github.com/benhoyt/inih), so I don't know...

Currently dhara component is tested by spi_nand_flash component examples/tests. Since dhara "port layer" is inside "spi_nand_flash", it's a bit difficult to write an example for dhara in isolation. We probably...

By the way, there seems to be some confusion between CDC and DFU flashing. > but this works: > esptool --chip esp32s2 --port /dev/ttyACM0 write_flash -z 0x10000 Here esptool didn't...