Fix SPI async busy wait

[andelf]

See-also #33

only async write is fixed.

To get END irq work:

• ~~DMA Bust must 1 for SPI~~
• ~~DMA transize must be actual_size + 1 for SPI~~

UPDATE

After some investigation:

• Only special values trigger this bug
• SPI END interrupt state is marked (INTRST.ENDINT is set), SPI interrupt is enabled(both peripheral and PLIC). But irq handler is never reached