image-processing-fpga
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harshbhosale01
Image processing on FPGA using verilog
Image-Processing-FPGA
Table of contents
- Aim
- About the Project
- Theory
- Flowchart
- Tech Stack
- Getting Started
- Results
Aim:
To compress and decompress an image with the help of JPEG algorithm on FPGA using Tang Primer Dev Board.
About the Project:
Implementing JPEG encoder algorithm with Verilog on FPGA as Phase 1. Phase 2 includes the interfacing of a camera module (preferably ov2640 or ov7670) and a TFT display.
Theory:
FPGA stands for Field Programmable Gate Array.
Flowchart:
Tech Stack:
- Verilog
- Tang Dynasty
- Tang Primer Dev Board
- Modelsim Altera
- FPGA
Getting Started:
- Download and install Tang Dynasty by following the instructions mentioned in the link above.
- Also istall the USB drivers of for Tang Primer Dev Board.
- Download and Install Modelsim.
- Clone or download the compression modules in this repo.
- Open Tang Dynasty and generate RTL file by creating project and following this process.
Results:
32x32 pixel input image and 70% compressed results
harshbhosale01