Add support for Apple M1 AArch64 SoCs

[arkivm]

Completely based on #150. Thanks to @sbehnke!

• Refactoring to accomodate the new source tree
• Adding more feature flags

As #150 is stale, I am just trying to push it across the finish line.

[arkivm]

No problem. Thanks for the great work. As numerous projects started tagging that they depend on this, I decided to push it forward.

[arkivm]

As @sbehnke did all the work, can someone tell me how to add something like Linux's Co-developed-by tag to a github PR? I would like @sbehnke to sign off this patch and I can add myself as a co-developer.

[arkivm]

Looks good on my M1 Max.

Great. Thank you for quickly testing it.

[toor1245]

I don't see the __arm64__ macro for CPU_FEATURES_ARCH_AARCH64 in cpu_features_macros.h? This macro is used for iphone

[arkivm]

I don't see the __arm64__ macro for CPU_FEATURES_ARCH_AARCH64 in cpu_features_macros.h? This macro is used for iphone

added this as well.

[arkivm]

bump

[gchatelet]

Thx for the work here @arkivm we now have a clearer vision of what's needed to support Apple M1. That said I find the PR too big to be pulled in as-is. I'd rather implement it by creating many small PR that fixes individual issues (see #209 ). Let's keep the PR around for now while we fix it incrementally.

[SchrodingerZhu]

How is the progress of merging?

[toor1245]

How is the progress of merging?

Hi @SchrodingerZhu, No updates yet.

@gchatelet, since, there were no updates for a long time, can we discuss what components to divide? I can do it if I get help in testing @arkvim, @sbehnke. Plus a lot of things are already clear to take into account inline assembly https://github.com/google/cpu_features/pull/186.

[mscdex]

Would it be possible to land this soon?

For what it's worth I've gone ahead and applied the changes (fixing several merge conflicts) on top of v0.8.0 and I have had at least one M1 user report that it works (I do not have access to Apple Silicon hardware myself). If anyone is interested in these changes, they can be found in the patch here.

[gchatelet]

I fixed the patch merging. @Mizux would you be able to test this patch on Apple silicon? Then it should be good to go.

[Mizux]

FYI, I'm currently rebasing this branch on main since the merge of the PR for aarch64 Windows conflict... EDIT: my bad rebase on main is borken but merging was ok

I have a Apple M1 and one Intel so I can test ;)

[Mizux]

[^v^]─corentinl@corentinl-macbookpro2 %CTEST_OUTPUT_ON_FAILURE=1 cmake --build build --target test -v
Running tests...
/opt/homebrew/Cellar/cmake/3.26.4/bin/ctest --force-new-ctest-process 
Test project /Users/corentinl/work/cpu_features/build
    Start 1: bit_utils_test
1/4 Test #1: bit_utils_test ...................   Passed    0.00 sec
    Start 2: string_view_test
2/4 Test #2: string_view_test .................   Passed    0.00 sec
    Start 3: stack_line_reader_test
3/4 Test #3: stack_line_reader_test ...........   Passed    0.00 sec
    Start 4: cpuinfo_aarch64_test
4/4 Test #4: cpuinfo_aarch64_test .............   Passed    0.65 sec

100% tests passed, 0 tests failed out of 4

[0]─[~/work/cpu_features]-[aarch64-darwin-support]
[^u^]─corentinl@corentinl-macbookpro2 %build/test/cpuinfo_aarch64_test 
Running main() from gmock_main.cc
[==========] Running 2 tests from 2 test suites.
[----------] Global test environment set-up.
[----------] 1 test from CpuinfoAarch64Test
[ RUN      ] CpuinfoAarch64Test.Aarch64FeaturesEnum
[       OK ] CpuinfoAarch64Test.Aarch64FeaturesEnum (0 ms)
[----------] 1 test from CpuinfoAarch64Test (0 ms total)

[----------] 1 test from CpuidAarch64Test
[ RUN      ] CpuidAarch64Test.FromDarwinSysctlFromName
[       OK ] CpuidAarch64Test.FromDarwinSysctlFromName (0 ms)
[----------] 1 test from CpuidAarch64Test (0 ms total)

[----------] Global test environment tear-down
[==========] 2 tests from 2 test suites ran. (0 ms total)
[  PASSED  ] 2 tests.

[gchatelet]

@arkivm @Mizux

Looking at https://github.com/google/cpu_features/pull/204/files#diff-fc9e9a184d90d6afa52754eeef66a041131b11a4fddc7cb8668f7cf54d6d2585R54-R75 I feel like there are still quite a few features that need to be filled in from sysctlbyname. Do we have a way to get a complete list of available options?

[arkivm]

I rebased the patches and updated a few flags that got changed. There are a bunch of additional features on aarch64 apple m2 silicon. Does those features have to match with the Linux's hwcap?

[gchatelet]

I rebased the patches and updated a few flags that got changed.

Thx !

There are a bunch of additional features on aarch64 apple m2 silicon. Does those features have to match with the Linux's hwcap?

AFAIU both sysctlbyname and hwcap are Linux maintained variables so I hope they are consistent with each other 🤷. But for instance I don't quite know why we have hw.optional.arm.FEAT_SHA256 vs HWCAP_SHA2...

[Mizux]

sysctl on M1: https://gist.github.com/Mizux/fc3309b1efeb1454cc7b093c5f23992e (ed system_profiler SPHardwareDataType seems cool to identify device model)

[gchatelet]

Thx @Mizux, the list of features is the same between M1 and M2 but the following ones are 0 on M1 and 1 on M2.

hw.optional.arm.FEAT_PAuth2
hw.optional.arm.FEAT_FPAC
hw.optional.arm.FEAT_BF16
hw.optional.arm.FEAT_I8MM
hw.optional.arm.FEAT_BTI

[gchatelet]

Ok I think this is good for a first version. Let's iterate if needed. Thx all!