Add/test support for RISC-V

[jonnor]

It seems that the natmod support for RISC-V architecture may have gotten into a useful place now in MicroPython after 1.24. This is the architecture used by chips such as ESP32-C3, ESP32-C6

This should be possible by doing a build with ARCH=rv32imc. We also need to set up the relevant toolchain on CI to automate the builds.