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I created a synthetic example in https://github.com/eine/vunit/tree/axis/synthetic/examples/vhdl/array_axis_vcs/src/test, in an attempt to better understand this issue. According to previous comments here and in #673, the blocking behaviour is produced by `pop_axi_stream`...
> I'm not sure I fully understand the issue. > The pop_axi_stream with reference can be fully queued up, without any cycles in between. > When using the pop with...
> So I had a closer look, and I can't seem to reproduce this behavior. Can you please try the [array_axis_vcs](https://github.com/VUnit/vunit/tree/master/examples/vhdl/array_axis_vcs) example? The following waveform was generated with GHDL (`python3...
See http://vunit.github.io/py/ui.html#pre-and-post-simulation-hooks.
I think that this conflicts with #511, in the sense that [vc_uart](https://github.com/VUnit/vc_uart) or [vc_axi](https://github.com/VUnit/vc_axi) are expected to be references/templates for anyone willing to contribute with a third-party VC. Hence, I...
> Good examples are important but there is also a question about providing a minimum template, rationale for design patterns, tutorials, compliance tests etc. I thought that all these would...
> UART or any other VC will never care about all VC use cases nor use all of the features that VUnit provides for VC building. As a matter of...
> Based on our discussions I think the next step would be to create a template repository and then the mechanism allowing such a repo to be evaluated from a...
Ref: https://help.github.com/en/articles/creating-a-template-repository
Apart from the in-code comments above, some other preliminary points: - Can we merge the rules about having a single package/entity in a single file? - Can we have the...