Simavr package

[hernot]

Hi Took some time, last time we talked (chatted) is more than one year. I decided to start my pull request to start discussion about my additional changes, not implemented by you in main.

This pull request is based upon the current master branch (first commit is rebase onto it). The rest just singles out timer and interrupts such that periphery does not need to know the avr_t main structure of the core to work properly. It may even have its own timer and interrupt structure. The periphery timer provided by the simavr lib is a slave of the core timer. The consequence of this is that when the core is paused by the debugger, the periphery should also be paused at the same clock tick. For periphery which has to moc faster clock than core clock it has to handle the needed subticks it self.

The interrupts i singled out as in my project it will be possible to moc periphery without the need for direct access to the avr_t core structure. It is sufficient to use the interrupt structure.

Further the vci signal logger now allows to add and remove signals, which is likely to happen in graphical sketch and breadboard simulators.

please let me know you opinion and your advice.

On finalizing this pull request i will than squash all commits into one single commit unless you request otherwise.

[hernot]

shouldn't the tests make run_tests target be integrated with tarvis or did i just not properly read the output