suggestion for movss and movsd and possibly other similar case

[robertmuth]

Current movss is reflected in the table as:

    ["movss"            , "w:xmm[31:0], xmm[31:0]"                          , "RM"      , "F3 0F 10 /r"                  , "SSE"],
    ["movss"            , "W:xmm[31:0], m32"                                , "RM"      , "F3 0F 10 /r"                  , "SSE"],

Wouldn't it be more systematic to fold them into one entry:

    ["movss"            , "w:xmm[31:0], xmm[31:0]/m32"                          , "RM"      , "F3 0F 10 /r"                  , "SSE"],

There is also a strange asymmetry where the MR variant only has the W:m32 flavor. Not sure if this is an ISA quirk or a transcription error:

["movss"            , "W:m32, xmm[31:0]"                                , "MR"      , "F3 0F 11 /r"                  , "SSE"],

[kobalicek]

No, because when movss reads from memory, it clears the rest of the destination register, when movss uses two registers, it only overwrites 4 bytes in the destination and keeps the rest. This information is important for AsmJit as it can do liveness analysis of code, which means that it needs to know whether a register is completely overwritten or not, which is described by W: (overwrite) vs w: (write)

[kobalicek]

This is basically what you model with W - W means writing into a register and zero extending the rest of it. w means writing only to a specific part of the register.

[robertmuth]

my bad - I did not pick up the lower vs upper case "w" difference.

what about the second part of my question?