Vitis_Accel_Examples
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Xilinx
Vitis_Accel_Examples
Hi, I have a question about the performance between [host_memory_bandwidth](https://github.com/Xilinx/Vitis_Accel_Examples/tree/master/performance/host_memory_bandwidth) and [host_memory_bandwidth_xrt](https://github.com/Xilinx/Vitis_Accel_Examples/tree/master/performance/host_memory_bandwidth_xrt). It seems that they have same kernel and similar host code, but the performance results are quite different....
Use Vitis 2021.1 platform, XRT version is 2.11.634 and branch is 2021.1. Running `hbm_rama_ip` demo on the U50 platform, the results are as follows:  Looking forward to your help.
No matter what example I choose, sw_emu (`make run TARGET=sw_emu PLATFORM=$AWS_PLATFORM all` passes successfully but hw_emu (make run TARGET=hw_emu PLATFORM=$AWS_PLATFORM all) hangs and never finishes. The output of the command:...
Hi all, I am currently trying to add some HLS IP on kv260 with 2022.1 tool chain. I have tried the basic vadd example, it could run properly on zcu104....
ADDR_BITS must be equal to C_S_AXI_ADDR_WIDTH. If the user wants to add more arguments then it will create a bug, that is not easily detected. Kindly request to you update...
Hi, According to the [VITIS ACCEL EXAMPLE Doc](https://xilinx.github.io/Vitis_Accel_Examples/2023.1/html/compile_execute.html#compiling-for-fpga-accelerator-card), I'm tring to test the code of P2P bandwidth example for my SmartSSD. However, I got a error when I run the...
Hi all, I'm running the aie_adder demo in hw_emu flow, and I want to log all signals' waveform when running hw_emu the way I log all waveform is that add...
