Fix SEC_STAT.IRM bit handling in ARC SEM interrupt entry/exit

[vishwamartur]

Related to #331

Fix the Memory Read Protection Violation from Secure MPU exception on exit from interrupt.

• Add lr r3, [0x09] /* store SEC_STAT.IRM */ and and r3, r3, 0x8 before PUSH r3 in EXCEPTION_PROLOGUE and INTERRUPT_PROLOGUE.
• Add POP r3 /* restore SEC_STAT.IRM */ and sflag r3 before POP r30 in EXCEPTION_EPILOGUE and INTERRUPT_EPILOGUE.

[sonarqubecloud[bot]]

Quality Gate passed

Issues
0 New issues
0 Accepted issues

Measures
0 Security Hotspots
0.0% Coverage on New Code
0.0% Duplication on New Code

See analysis details on SonarCloud

[ActoryOu]

Hi @vishwamartur, Thanks for your contribution! Could you help share the verification result?

[aggarg]

@vishwamartur Would you please share how you tested these changes?

[vishwamartur]

Hi @ActoryOu and @aggarg,

Sorry, I haven't tested these changes yet as I don't currently have access to a compatible board for this setup. If you have any recommendations for an alternative testing approach or an emulator that supports this configuration, please let me know, and I'll be happy to proceed accordingly.

Thank you!

[aggarg]

This is a 3P port and I do not have the hardware to test the changes. I do not think we can merge untested changes. Do you plan to test these changes? Also, how did you decide what changes are needed - this information may help us in reviewing?

[jeanthom]

Hi, I just wanted to warn that the author of this PR has spammed many repositories with AI-generated nonsense. If you consider this PR to be nonsensical too, please consider reporting them as spam.

Just for reference:

• https://github.com/dirtyjtag/DirtyJTAG/pull/115
• https://github.com/ublue-os/bazzite/pull/1861

[aggarg]

@jeanthom Thank you for informing us.

@vishwamartur Would you please share if you plan to test these changes. I am also interested in learning how did you decide which changes are needed.

[aggarg]

I am closing this PR. Please open a new one when you have tested the changes.